矽恩 designer jobs (salary & requirements)

矽恩 designer salary range: 10K - 50K, where 100% of positions earn ¥10-50K

***  ? 10-15K ***  ? 30-50K

矽恩 designer salary range: 10K-50K, the most positions earn 10-15K, based on 4 related positions in the past year, as of 2026-09-25

￥10-50K

100% of positions earn

Note: the average salary is analyzed based on job postings published by the company. We recommend reviewing it together with position type, education, region and experience.

矽恩 designer salary changes over the years

Note: the data depends on salary samples of online job postings in the corresponding years and does not fully represent the actual situation within the company. For reference only.

Education requirements: 本科 is the most common

50% 本科 50% 硕士

What education does 矽恩 require for designer positions? 本科占比最多，占50%，硕士占50%

Salary by education

矽恩 designer salaries by education: 本科 ¥12.5K, 硕士 ¥40.0K.

Experience requirements: 1-3年 is the most common

75% 1-3年 25% 3-5年

What experience does 矽恩 require for designer positions? 1-3年占比最多，占75%，3-5年占25%

Salary by experience

矽恩 designer salaries by experience: 1-3年 ¥21.7K, 3-5年 ¥40.0K.

矽恩 designer hiring regions: mainly 合肥, 武汉

合肥￥12.5K 50%(2) 򀀩

武汉 򀀩

In which cities does 矽恩 have offices for designer positions? The main distribution is as follows: 合肥 accounts for 50%. Click this module to view the proportions of other cities, based on job postings in the past year. For reference only.

矽恩 designer hiring trends over the years

矽恩 designer changes in hiring volume over the years

What does 矽恩 designer do

Based on related job postings of 矽恩 in the past year

IC Designer （Digital）数字IC设计工程师
武汉-洪山区 | 3-5年 | 硕士以上 | 2026-09-23
20000-40000

Essential Functions:
1、负责全芯片静态时序分析（STA），审核并优化SDC约束，配合后端APR团队完成时序收敛;
2、负责芯片DFT可测性设计，生成测试向量、分析测试覆盖率，排查并解决DFT设计问题，持续优化芯片可测性与测试覆盖率；
3、基于Tcl、Python、Bash等脚本语言，搭建、优化设计自动化流程，实现综合、时序分析、DFT设计、报告输出等流程自动化，提升项目研发效率；
4、配合APR团队完成项目迭代、时序收敛及技术对接工作；
5、负责数字模块的规格定义、方案设计、文档编写，独立完成Verilog RTL代码设计、功能仿真与验证工作，保障设计合规、可靠;

Qualifications:
1、具有3年及以上数字设计工作经验。
2、熟悉数字芯片设计流程，熟练掌握verilog语言。
3、熟练使用EDA工具，熟悉DFT基本理论和设计流程。
4、熟练使用脚本语言Tcl/Perl/Python/bash完成设计自动化流程。
5、具备较强支持数字电路APR的能力。
6、优秀的职业素养，良好的沟通能力和团队精神。
7、具备积极主动的工作态度。
More
IC Designer（Analog）模拟IC设计工程师
武汉 | 1-3年 | 硕士以上 | 2026-09-08

20-40k·13薪 򀀩
Layout Designer版图设计师
合肥 | 1-3年 | 本科以上 | 2026-09-08

8-15k·13薪 򀀩

厦门 designer salary

Most common salary

10-15K

vs last year

How much does 厦门 designer pay? 10-15K is the most common

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