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深圳 layout jobs (salary & requirements)

江西联晟精密工业有限公司 layout salary range: 20K - 30K, where 100% of positions earn ¥20-30K
¥20-30K
100% of positions earn

Note: the average salary is analyzed based on job postings published by the company. We recommend reviewing it together with position type, education, region and experience.

江西联晟精密工业有限公司 layout salary changes over the years

Note: the data depends on salary samples of online job postings in the corresponding years and does not fully represent the actual situation within the company. For reference only.

Education requirements: 本科 is the most common

What education does 江西联晟精密工业有限公司 require for layout positions? 本科占比最多,占100%

Salary by education

江西联晟精密工业有限公司 layout salaries by education: 本科 ¥25.0K.

Experience requirements: 5-10年 is the most common

What experience does 江西联晟精密工业有限公司 require for layout positions? 5-10年占比最多,占100%

Salary by experience

江西联晟精密工业有限公司 layout salaries by experience: 5-10年 ¥25.0K.

layout hiring regions: mainly 深圳

In which cities does 江西联晟精密工业有限公司 have offices for layout positions? The main distribution is as follows: 深圳 accounts for 100%. Click this module to view the proportions of other cities, based on job postings in the past year. For reference only.

layout hiring trends over the years

layout changes in hiring volume over the years

深圳 layout related job postings

Based on related job postings of 江西联晟精密工业有限公司 in the past year
  • PCB Layout

    深圳 | 5-10年 | 本科以上 | 2026-03-18
    15-30k
    1.负责飞控主板、传感器模块、通信模块等核心电路板的Layout设计,满足无人机轻量化、低功耗与高稳定性需求。
    2.主导高速数字电路(FPGA/ARM/DSP)与模拟电路(射频/电源管理)的混合布局,优化信号完整性(SI)、电源完整性(PI)及电磁兼容性(EMC)。
    3.设计8层以上多层PCB,制定叠层结构、阻抗控制规则及热分布方案,支持刚柔结合板、类载板(SLP)等先进工艺。
    4.解决高速信号(如DDR5)的串扰、时序同步问题,完成眼图、差分阻抗等仿真验证(Keysight ADS/ANSYS HFSS)。
    5.优化电源网络(VRM布局、去耦电容策略),降低噪声与电压波动,配合硬件团队完成热仿真(Flotherm)。
    6.输出Gerber文件,确保可制造性/可测试性合规性。
    7.跟进PCB打样与试产,解决工艺问题(如翘曲、焊接空洞),优化测试点布局以支持自动化检测。
    8.跟踪前沿技术(如AI加速芯片集成、高密度互连HDI),推动PCB设计轻量化与高性能化。
    More

上饶 layout salary

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