Tianshu Zhixin dft jobs (salary & requirements)

Responsibilities:
The candidate is expected to be responsible ffollowing tasks
1. Participate in SOC full chip DFT feature architecture definition;
2. Implement SOC DFT function including SCAN, Boundary SCAN, MBIST, Analog Macro test logic;
3. Generate DFT related timing constraints work ftiming closure;
4. Develop verify high coverage cost-effective test patterns fthe production test;
5.Evaluate establish the advanced DFT tools flow.
Qualifications:
1. 8+ years’ experience fBachel5+ years fMaster in DFT design verification, test pattern development;
2. Good Knowledge of Scan/ATPG, MBIST boundary scan other DFT techniques;
3. Good Knowledge of industry DFT tools like DFTMax, TetraMax ,TestKompress, FastScan, Tessent Mbist, SMS etc.
4. Good knowledge of digital SoC/ASIC design, including STA, verification RTL coding;
5. Proficient in hardware description languages such as Verilog, System Verilog VHDL;
6. Good Knowledge of script language, such as Tcl, Python, Perl;
7. Good English communication skills;
8. Strong commitment to schedule work quality, good team player.