Zhongyin Microelectronics layout jobs (salary & requirements)

Zhongyin Microelectronics layout salary range: 15K - 30K, where 100% of positions earn ¥15-30K

***  ? 15-20K ***  ? 20-30K

Zhongyin Microelectronics layout salary range: 15K-30K, the most positions earn 15-20K, based on 2 related positions in the past year, as of 2026-09-28

￥15-30K

100% of positions earn

Note: the average salary is analyzed based on job postings published by the company. We recommend reviewing it together with position type, education, region and experience.

Zhongyin Microelectronics layout salary changes over the years

Note: the data depends on salary samples of online job postings in the corresponding years and does not fully represent the actual situation within the company. For reference only.

Education requirements: 本科 is the most common

50% 本科 50% 硕士

What education does Zhongyin Microelectronics require for layout positions? 本科占比最多，占50%，硕士占50%

Salary by education

Zhongyin Microelectronics layout salaries by education: 本科 ¥25.0K, 硕士 ¥17.5K.

Zhongyin Microelectronics layout hiring regions: mainly 北京, 苏州

北京￥17.5K 50%(1) 򀀩

苏州 򀀩

In which cities does Zhongyin Microelectronics have offices for layout positions? The main distribution is as follows: 北京 accounts for 50%. Click this module to view the proportions of other cities, based on job postings in the past year. For reference only.

Zhongyin Microelectronics layout hiring trends over the years

Zhongyin Microelectronics layout changes in hiring volume over the years

What does Zhongyin Microelectronics layout do

Based on related job postings of Zhongyin Microelectronics in the past year

封装设计/Layout工程师(J10194)
苏州-工业园区 | 本科以上 | 2025-11-30
2-3万·14薪

工作职责:
1. 芯片封装方案评估与选型。包括基板封装厂能力评估， B OM 制定，封装尺寸/叠层制定， ballmap 排布，设计细节沟通等。
2. 与公司内部及客户的后端团队协同进行 bump 的选型，排布和审核。
3. 高速 Serdes，DDR，HBM phy 的设计迭代。 IP 相关的封装开发。
3. 与SI/PI 团队及系统设计团队协同进行封装优化。
4. 封装基板设计和相关文档输出。包含 substrate layout, POD, gerber , assembly instruction 等。
5. 协调生产阶段出现的问题，进行失效分析，帮助封装厂进行工艺改进。
6. 先进封装 2.5D, 3D 工艺和封装技术的开发。
7. 熟悉封装相关的可靠性测试标准
任职资格:
1. 全日制本科及以上，半导体封装材料机械等专业, 5年以上封装设计经验。
2. 熟悉和了解 FCBGA, FCCSP, WLCSP, WLBGA, MCM 等封装类型的工艺流程和设计要点。熟练使用 Cadence APD 和 AutoCAD 。
3. 理解封装各个性能指标和关键点。
4. 良好的团队合作精神，乐于沟通分享。
5. 2.5D 3D 封装经验是加分项。
More
封装Layout工程师
北京 | 硕士以上 | 2026-08-09

10.0-99.9K/月 򀀩

北京 layout salary

Most common salary

20-30K

vs last year

How much does 北京 layout pay? 20-30K is the most common

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