soc设计岗位职责

岗位职责：
1.完成子系统/子模块功能的规格定义和微架构定义
2.完成从微架构到RTL的逻辑实现
3.协助验证团队完成功能验证, 实现功能和性能达标
4.配合完成所负责模块的可测性设计和量产测试方案
5.配合后端实现团队完成所负责模块的Timing和Power Signoff

任职要求：
1.3年以上IC/Soc设计经验
2.熟悉PCIe、CXL、UCIe等高速接口协议和应用
3.熟悉AMBA等各类标准总线协议,并有片内总线互联开发经验
4.片内总线性能、延迟优化分析的经验
5.基于实际Floorplan进行不同拓扑结构的PPA分析经验
6.熟悉STA和低功耗设计

职位描述
In this role, you will work with software hardware engineering groups to define the cutting edge of next-generation AI SOC chips fhigh-performance computing platform in Data Center.
as a design engineer, strong coding skill of system Verilog Verilog to implement RTL design, develop SOC domain system/interface IP fvarious SOCs
familiar with ASIC flow to complex SOCs with advanced methodologies more efficient, participated 3rd party IP integration
strong problem solving solution fSOC design IP integration, timing closure, silicon bring up issue debug
Documents the high-level architecture specification that defines the chip with various sub-systems fthe cutting-edge cloud applications.
Works closely with PD, power, system, verification team to bring up the subsystem
职位要求
Minimum of 5 years of experience on complex SOC design fproven silicons.
Strong experience on following domain: CPU, GPU, PCIe, Memory, Network.
Experience on one more of following domain: AXI 4.0(higher), NOC, Coherency, Virtualization, Security, RAS, power management, SerDes, PHY.
Good verbal written skill fcommunication
Hands-on experience on the performance simulation analysis is a good plus
Server grade design, familiar with CLK/RESET tree implement, SPI/GPIO/UART/I3C peripheral IO is a plus.

职位描述
1.与系统架构师合作定义芯片的D2D/C2C规格,以满足功能,性能,功力耗和成本目标;
2.负责SOC中领域相关IP(如UCIe/XSR)的设计和集成交付;
3.与软件和硬件团队合作确保D2D/C2C功能的实现和优化,支持产品测试和调试解决开发过程中的技术问题;
4.跟踪D2D/C2C领域*新技术和行业标准,将其应用于产品开发中中;
加分项:
有成功的SOC设计和量产经验。